1. Field of the Invention
The present invention relates to an IC card, and more specifically, it relates to an IC card which stores a test program and an application program.
2. Description of the Background Art
FIG. 4 is a block diagram showing the structure of a conventional IC card 10. This IC card 10 contains a bus 2, and ROMs 3 and 4 for storing invariant data, an EEPROM 5 for storing variable data, a RAM 6 for temporarily storing data, and an input/output circuit 7 for inputting/outputting data in relation to an external apparatus, which are connected with each other through the bus 2.
The ROM 3 stores a test program for the maker of the IC card 10 for testing the operation of the internal circuit, and the ROM 3 stores an application program for the user for executing various functions. The EEPROM 5 is provided with a test storage region 51 storing passwords, which is accessible only when the test program is executed.
The IC card 10 is provided with a positive power input terminal P1, a power earthing terminal P2, a reset signal terminal P3 for receiving a reset signal for initializing a CPU 1, a clock terminal P4 for receiving a clock signal, and an I/O terminal P5 for inputting/outputting data.
FIG. 5 is an explanatory diagram showing procedures for starting execution of application and test programs. The CPU 1 executes processing 300 by a test program 31 and processing 400 by an application program 41, and the processing 300 by the test program 31 includes a branch point routine 32 and a password confirming routine 33, in addition to the test program 31.
FIGS. 6A and 6B are conceptual diagrams showing memory maps during execution the application and test programs 41 and 31 respectively. The memory map shown in FIG. 6A, which is in execution of the application program 41, is provided with the EEPROM 5 and the application program 41. On the other hand, the memory map shown in FIG. 6B, which is in execution of the test program 31, is provided with the test storage region 51, the EEPROM 5, the application program 41, the branch point routine 32, the password confirming routine 33 and the test program 31.
During execution of the application program 41, it is impossible to read/write data from/in the test storage region 51 by the application program 41 since the memory map is so provided that the test storage region 51 is hidden by hardware.
The operation of this IC card 10 is now described with reference to FIG. 5, showing the procedures for executing the programs. When a reset signal is inputted in the reset signal terminal P3, the CPU 1 reads out an execution starting address for the branch point routine 32 from a prescribed address of the ROM 3, to start execution of the branch point routine 32 from this execution starting address. Transition from the branch point routine 32 to the password confirming routine 33 takes place when an execution command for the test program 31 is inputted in the I/O terminal P5 from the external apparatus.
The password confirming routine 33 checks a password which is supplied from the external apparatus to the I/O terminal P5 with that stored in the test storage region 51, to execute the test program 31 upon matching, while interrupting execution of the test program 31 upon mismatching.
This test program 31 is executed by the memory map shown in FIG. 6B. When the test storage region 51 stores no password, therefore, the supplied password is checked with a dummy password which is written in the test program 31.
In order to make a decision as to whether or not the test storage region 61 stores a password, data whose discipline is different from that of initial data upon fabrication of the IC card 10 is stored in the EEPROM 5, to confirm whether or not the password to be checked matches with the stored data.
The test program 31 is provided with a function which can access a prescribed address for enabling a sufficient product test, so that the CPU accesses each address in accordance with the test program 31, thereby performing the product test.
When no execution command for the test program 31 is supplied to the I/O terminal P5, an execution starting address for the application program 41, which is previously stored in a prescribed address of the ROM 4, is read for starting execution of the application program 41 from this execution starting address.
As shown in FIG. 6A, it is impossible to read/write data from/in the test storage region 51 during execution of the application program 41. Thus, the content of the test program 31 is protected even if the application program 41 runs away.
When the IC card 10 is connected with the external apparatus as described above to be driven as a system, the test storage region 51 is not accessible during execution of the application program 41. Therefore, the external apparatus cannot read data from the test storage region 51 to identity the IC card 10 which is connected therewith. Thus, when the IC card 10 is duplicated by decoding and executing the application program 41 for rewriting the content of the EEPROM 5, it may be possible to fraudulently use the IC card 10.